EXCLUSIVE-CONTROLLING HISTORY ACQUISITION SYSTEM

摘要

PURPOSE:To correctly acquire execution history while influence given to the execution state of a parallel program is suppressed to a minimum by providing a register to show the presence of the acquisition of history in each CPU, and storing the execution history in a shared memory while keeping still a bus lock state if the register is ON. CONSTITUTION:The register 203 to show whether the execution history of an instruction accompanying bus lock is to be acquired or not is provided in the CPU 200, and if the register is ON, a microprogrammed instruction stores the information of a program counter, etc., or the information of a time stamp, etc., by a global timer in a storing destination address on a memory after setting the bus lock state in addition to original work such as the rewriting of the contents of the memory, etc. On the contrary, if the register 203 is OFF, it executes the original work after setting the bus lock state, and releases a shared bus. Through this method, the execution history can be acquired correctly, and besides, the influence to the execution state of the parallel processing program can be minimized compared with the method by softwave.