PROCESS FOR TESTING A STORE ARRANGED ON A SEMICONDUCTOR COMPONENT AS A MACROCELL ON THE SELF-TESTING PRINCIPLE AND CIRCUIT FOR IMPLEMENTING SAID PROCESS

摘要

In the automatic test method, test samples are introduced into memory, and in this case into its cells, and written there, then memory cells are read and defective memory cells are detected by means of the memory cells. readings of the answers to the test. The test algorithm serving to produce the test samples is executed in such a way that, in a first phase (PH1), it stores in bits logical values of a determined type ("0" or "1") in the elements of the memory cells and then introduce a pause. In a subsequent phase (PH3), each memory cell is read in a single test cycle with a current sequence of addresses and then a pseudo-random test sample is written into the memory cell. The test cycle is repeated until a desired error detection rate is obtained. This memory test algorithm makes it possible to produce a macrocell comprising a memory and additional automatic test circuits which can be easily parameterized and which can be produced by automatic methods; the algorithm has universal application and requires only reduced testing time.