首页> 外国专利> WAITING TIME GITTER DROPPING CIRCUIT OF SYNCHRONOUS MULIPLE APPARATUS

WAITING TIME GITTER DROPPING CIRCUIT OF SYNCHRONOUS MULIPLE APPARATUS

机译:同步多路器具的等待时间下降器下降电路

摘要

The circuit decreases waiting time jitter generated in a reverse mapping unit during stuffing. The circuit includes a line driving unit (15) for transmitting and for receiving DS3 asynchronous signal, a stuffing and synchronizing unit (1) connected to the line driving unit to map DS3 asynchronous signal to VC32 signal, a de-stuffing and reverse-synchronizing unit (18) connected to the line driving unit to map VC32 signal to DS3 asynchronous signal, and an interface unit (17) for supervising the stuffing and synchronizing unit (1) and the de-stuffing and reverse-synchronizing unit (18).
机译:该电路减少了填充期间在反向映射单元中产生的等待时间抖动。该电路包括用于发送和接收DS3异步信号的线驱动单元(15),连接到该线驱动单元以将DS3异步信号映射到VC32信号的填充和同步单元(1),去填充和反向同步单元(18)连接到线路驱动单元,以将VC32信号映射到DS3异步信号,以及接口单元(17),用于监视填充和同步单元(1)和去填充和反向同步单元(18)。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号