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METHOD OF CONTROLLING AND STABILIZING AVERAGE CURRENT DENSITY IN ELECTROPLATING BATH
METHOD OF CONTROLLING AND STABILIZING AVERAGE CURRENT DENSITY IN ELECTROPLATING BATH
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机译:控制和稳定电镀浴中平均电流密度的方法
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use: electroplating, in particular the office of u043du0430u043du0435u0441u0435u043du0438u00a0 coating processes.the essence of the u0438u0437u043eu0431u0440u0435u0442u0435u043du0438u00a0: bath u043fu0438u0442u0430u044eu0442u0438u043cu043fu0443u043bu044cu0441u043du044bu043c u043du0430u043fu0440u00a0u0436u0435u043du0438u0435u043c and stabilize the u043du0430u043fu0440u00a0u0436u0435u043du0438u0435 between the additional electrode and cathode with, u0438u0437u043cu0435u0440u00a0u0435u043cu044bu043c in pause current baths, p the stability of this rich u043du0430u043fu0440u00a0u0436u0435u043du0438u00a0 u043fu043eu0432u044bu0448u0430u0435u0442u0441u00a0 by u0438u0441u043fu043eu043bu044cu0437u043eu0432u0430u043du0438u00a0 information quantity of electricity through a leaky tub every impulse u043fu0438u0442u0430u043du0438u00a0 in anna. to provide with the device.set up a government contains u0433u0430u043bu044cu0432u0430u043du0438u0447u0435u0441u043au0443u044e bath 1, part 2, an anode 3, treated areas,.u0434u043eu043fu043eu043bu043du0438u0442u0435u043bu044cu043du044bu0439 electrode 4, a power key 5, the built-in second harmonic generator 6, u0432u0440u0435u043cu00a0u0438u043cu043fu0443u043bu044cu0441u043du044bu0439 surmounted u0431u0440u0430u0437u043eu0432u0430u0442u0435u043bu044c (vip) 7, u0444u043eu0440u043cu0438u0440u043eu0432u0430u0442u0435u043bu0438 short pulses of 8.9, the sampling device is u0445u0440u0430u043du0435u043du0438u00a0 u0443u0432u04451 u0443u0432u04452 10, 11, u0443u0432u0445u0437 13, u0441u0443u043cu043cu0438u0440u0443u044eu0449u0438u0439 amplifier 12, the integrator 14, a shunt 15, and u0432u0445u043e dr. key 5 is connected with the power.u043du0430u043fu0440u00a0u0436u0435u043du0438u00a0 plus source, and the outlet to the anode 3, u043eu0431u0440u0430u0431u0430u0442u044bu0432u0430u0435u043cu0430u00a0 piece 2 connected to an integrator 14, and one end of a bypass 15, the second end of which, against whom n electrode 4 is connected to a common drive entrances u0443u0432u04451 u0443u0432u04452 10 and 11, the output u0443u0432u04451 10 combined with the first entrance u0441u0443u043cu043cu0438u0440u0443u044eu0449u0435u0433u043e u0443u0441u0438u043bu0438u0442u0435u043bu00a0, second exit u0441u0443u043cu043cu0438 an u0443u0441u0438u043bu0438u0442u0435u043bu00a0 12 connected to the exit u0443u0432u04452 11the third gate is connected u043du0430u043fu0440u00a0u0436u0435u043du0438u0435 u0443u0441u0442u0430u0432u043au0438 Uo, to the fourth output device sample is u0445u0440u0430u043du0435u043du0438u00a0 u0443u0432u0445u0437 13. u043fu00a0u0442u044bu0439 entrance combined with an integrator 14 and the entrance of u0443u0432u0445u0437 13.solution u0441u0443u043cu043cu0438u0440u0443u044eu0449u0435u0433u043e u0443u0441u0438u043bu0438u0442u0435u043bu00a0 12 combined with a gate 7, u0441u0442u0440u043eu0431u0438u0440u0443u0435 organization entrance which is connected to an entrance u0444u043eu0440u043cu0438u0440u043eu0432u0430u0442u0435u043bu00a0 asking the generator 6 and 8, the output fo u0440u043cu0438u0440u043eu0432u0430u0442u0435u043bu00a0 8 integrated with the entrance u0443u043fu0440u0430u0432u043bu0435u043du0438u00a0 u0443u0432u04452 11 and the entrance of the integrator 14.the output signal 7 is served on the u0443u043fu0440u0430u0432u043bu00a0u044eu0449u0438u0439 vip entrance of the key 5 and the entrance u0444u043eu0440u043cu0438u0440u043eu0432u0430u0442u0435u043bu00a0 9 out of which combined with the u0443u043fu0440u0430u0432u043bu00a0u044eu0449u0438u043cu0438 entrances u0443u0432u04451 u0443u0432u0445u0437 10 and 13. 1 il. ate g 00 of yu (yu
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