Read-write buffer with integrated test circuitry - compares register contents of two feedback shift registers after writing of data to specific address, and after reading of buffer

摘要

The test circuitry for the synchronising buffer (20) consists of a shift register with feedback (17) to which buffer input data are sent. A similar shift register (19) is connected to the output of the buffer. The register outputs are input to a comparison circuit (20). Buffer input data is supplied by multiplexer (3) which has input data from (5) or test circuit (7). Other circuit elements are address generators (11,14). The system operates by comparing input and output data written to all buffer addresses, and provides a simple check on data integrity without the use of parity checks or otherwise. USE/ADVANTAGE - E.g. for shift register or FIFO with dual port RAM. Simple functional test for detecting defective components.