首页> 外国专利> FET contg. potential barriers - has source-drain regions on substrate, gate electrode on insulation layer, channel region between substrate, source-drain and semiconductor layers

FET contg. potential barriers - has source-drain regions on substrate, gate electrode on insulation layer, channel region between substrate, source-drain and semiconductor layers

机译:场效应管续势垒-在衬底上具有源极-漏极区,在绝缘层上具有栅电极,在衬底之间的沟道区,源极-漏极和半导体层

摘要

FET has a pair of source/drain regions (5) on a main substrate surface, an insulation layer (6) formed on the main surface, a gate electrode (9) on the insulation layer surface, a channel region (7) formed in the substrate between the pair of source/drain regions, and spaced first and second semiconductor layers (2) which have a bandgap wider than that of the silicon in the channel region and which inhibit majority carrier movement between the pair of source and drain regions. Processes for prodn. of the FET are also claimed. ADVANTAGE - The FET exhibits a large resonant quantum tunnel effect and is simple and inexpensive to mfr.
机译:FET在主基板表面上具有一对源/漏区(5),在主表面上形成的绝缘层(6),在绝缘层表面上的栅电极(9),在其中形成的沟道区(7)。一对源/漏区之间的衬底,以及间隔开的第一和第二半导体层(2),其带隙比沟道区中的硅的带隙宽,并且抑制多数载流子在一对源/漏区之间移动。生产过程还要求保护FET的数量。优点-FET表现出大的共振量子隧道效应,制造成本低廉。

著录项

  • 公开/公告号DE4212861A1

    专利类型

  • 公开/公告日1992-11-12

    原文格式PDF

  • 申请/专利权人 MITSUBISHI DENKI K.K. TOKIO/TOKYO JP;

    申请/专利号DE19924212861

  • 发明设计人 KUSUNOKI SHIGERU ITAMI HYOGO JP;

    申请日1992-04-16

  • 分类号H01L29/784;H01L21/335;H01L29/267;

  • 国家 DE

  • 入库时间 2022-08-22 05:01:21

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