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Apparatus for disabling unused cache tag input/output pins during processor reset by sensing pull-down resistors connected to disabled pins
Apparatus for disabling unused cache tag input/output pins during processor reset by sensing pull-down resistors connected to disabled pins
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机译:通过感测连接到禁用引脚的下拉电阻来禁用处理器重置期间禁用未使用的缓存标签输入/输出引脚的设备
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摘要
A method of programming a cache tag comparator by designing a semiconductor device's internal circuitry such that an input/output pin of the device may be programmed by an external resistor to ground that will indicate during the reset phase of the device that an alternate function for the pin is to be selected or that the pin itself is to be disabled.
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