Half-flash analog-to-digital converter using differential comparators and crossover switching

摘要

A resistor-string divided into plural sets of unit-resistors generates plural reference voltages for the upper bits, while each divided set generates plural reference voltages for the lower bits. A first and second differential input are generated in direct and inverse proportion to the analog input voltage. Differential comparators for the upper bits compare two differential voltages from between the two reference voltages and the first and second differential input votlages. Two of the divided sets are selected according to the upper bit digital value and one reference voltage from each selected set is switched to a differential comparator for the lower order bits. Lower order bit comparison is similar to the high order comparison described above. Final digital value is obtained by linking the upper and lower bits digital value.