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Packed switching manner and packed switching device

机译:打包切换方式和打包切换装置

摘要

PURPOSE:To improve the quality with respect to delay by generating a packet in parallel during queuing delay of exchange processing and processing the queuing delay of exchange processing in common to packet generation delay. CONSTITUTION:A scheduler 117 applies buffering to a transmission request 116 from an exchange request unit 303 of a packet generator 115, sends an exchange start signal 118 to the unit 115 and an exchange start signal 119 to the switch 111 in the order of first-come of the request 116 at each reception of a reply signal from the exchange switch 111. Then the unit 115 receiving the signal 118 adds a packet header stored in an FIFO buffer 302 to generate a packet. A buffer 302 starts storage of new information together with said operation and the unit 303 sends the next request 116 to the scheduler 117. The generated packet is sent to the switch 111, where it is subject to exchange processing and the result is sent to an outgoing line 104.
机译:目的:通过在交换处理的排队延迟期间并行生成一个数据包,并处理与交换包生成延迟相同的交换处理的排队延迟,以提高延迟的质量。组成:调度程序117对来自数据包生成器115的交换请求单元303的传输请求116进行缓冲,将交换开始信号118发送至单元115,并将交换开始信号119发送至交换机111,顺序为:在每次接收到来自交换交换机111的应答信号时,请求116发出请求。然后,接收信号118的单元115将存储在FIFO缓冲器302中的分组首标相加以生成分组。缓冲器302与所述操作一起开始存储新信息,并且单元303将下一个请求116发送至调度器117。所生成的分组被发送至交换机111,在此处进行交换处理,并且结果被发送至交换机。出线104。

著录项

  • 公开/公告号JPH0666812B2

    专利类型

  • 公开/公告日1994-08-24

    原文格式PDF

  • 申请/专利权人 日本電気株式会社;

    申请/专利号JP19880004156

  • 发明设计人 村瀬 勉;

    申请日1988-01-11

  • 分类号H04L12/56;

  • 国家 JP

  • 入库时间 2022-08-22 04:55:04

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