首页> 外国专利> INSULATING SWITCH, BIDIRECTIONAL INSULATING SWITCH, INSULATING SWITCHING CIRCUIT, BIDIRECTIONAL INSULATING SWITCHING CIRCUIT, THREE TERMINAL INSULATING SWITCHING CIRCUIT, THREE-TERMINAL BIDIRECTIONAL INSULATING SWITCHING CIRCUIT, MULTI-TERMINAL SWITCHING TYPE BIDIRECTIONAL INSULATING SWITCHING CIRCUIT, AND ELECTRONIC IGNITION DISTRIBUTION CIRCUIT

INSULATING SWITCH, BIDIRECTIONAL INSULATING SWITCH, INSULATING SWITCHING CIRCUIT, BIDIRECTIONAL INSULATING SWITCHING CIRCUIT, THREE TERMINAL INSULATING SWITCHING CIRCUIT, THREE-TERMINAL BIDIRECTIONAL INSULATING SWITCHING CIRCUIT, MULTI-TERMINAL SWITCHING TYPE BIDIRECTIONAL INSULATING SWITCHING CIRCUIT, AND ELECTRONIC IGNITION DISTRIBUTION CIRCUIT

机译:绝缘开关,双向绝缘开关,双向绝缘开关电路,双向绝缘开关电路,三端绝缘开关电路,三端双向绝缘开关电路,多端插拔式开关电路,多端绝缘式接线

摘要

PURPOSE: To unconditionally provide one of the above mentioned circuits, etc., with an isolation function. ;CONSTITUTION: The 1st to 4th controllable unidirectional switches are constituted of connecting one by one diodes 11 to 14 to the drains of a PMOS 1, an NMOS 2, a PMOS 3, and an NMOS 4 e.g. both the sources of the PMOS1 and the NMOS 2 are mutually connected, the 3rd and 4th unidirectional switches are serially connected to a DC power supply 7 in the same direction so that both the sources of the PMOS 3 and the NMOS 4 hold the power supply 7 between, and when the 3rd and 4th unidirectional switches turn on a closed circuit for controlling to turn off the PMOS 1 and the NMOS 2 is constituted. Simultaneously the DC power suply 7 constitutes a closed circuit for charging a capacitor 10, and when the 3rd and 4th unidirectional switches are off, the capacitor 10 constitutes a closed circuit for biasing the PMOS 1 and the NMOS 2 in the forward direction. Consequently the isolation insulating function can be unconditionally obtained independently of the on/off of the PMOS 1 and the NMOS 2.;COPYRIGHT: (C)1994,JPO&Japio
机译:目的:无条件地为上述电路之一提供隔离功能。组成:第一至第四可控单向开关由将二极管11至14一对一地连接到​​PMOS 1,NMOS 2,PMOS 3和NMOS 4的漏极组成。 PMOS1和NMOS 2的两个源极相互连接,第三和第四单向开关沿相同方向串联连接到DC电源7,从而PMOS 3和NMOS 4的两个源极都保持电源如图7所示,构成第三单向开关和第四单向开关导通时的闭合电路,该闭合电路用于控制PMOS 1和NMOS 2的截止。同时,直流电源7构成用于对电容器10充电的闭合电路,并且当第三和第四单向开关断开时,电容器10构成用于向正向偏置PMOS 1和NMOS 2的闭合电路。因此,可以独立于PMOS 1和NMOS 2的开/关而无条件地获得隔离绝缘功能。版权所有:(C)1994,JPO&Japio

著录项

  • 公开/公告号JPH06196991A

    专利类型

  • 公开/公告日1994-07-15

    原文格式PDF

  • 申请/专利权人 SUZUKI TOSHIYASU;

    申请/专利号JP19930227756

  • 发明设计人 SUZUKI TOSHIYASU;

    申请日1993-07-29

  • 分类号H03K17/687;F02P7/03;H03K17/56;H03K17/68;H03K17/722;

  • 国家 JP

  • 入库时间 2022-08-22 04:52:38

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