PURPOSE: To omit the interpretation of instruction codes of machine word levels of a target program in a simulation executing state and therefore to increase the simulating speed by carrying out the interpretation of the instruction codes of the target program and the conversion of these codes into the instruction codes of a host CPU at the precedent stage. ;CONSTITUTION: A converter means 10 of a CPU simulator 1 interprets the instruction codes 2-1-2-n of machine word levels of a target program 2 developed by a target CPU. Then the simulator 1 produces a simulation program 13 which is shown in the combination of instruction codes 13-1-13-n of assembler language levels or machine word levels of a host CPU 12 which attains the functions equivalent to those functions attained by the codes 2-1-2-n. The program 13 is stored in a memory 11. The CPU 12 carries out the program 13 in order to simulate the program 2.;COPYRIGHT: (C)1994,JPO&Japio
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