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METHOD AND DEVICE FOR HIGH-PERFORMANCE INTERCONNECTION BETWEEN INTERFACE CIRCUITS COUPLED WITH INFORMATION BUSES

机译:用于信息总线耦合的接口电路之间的高性能互连的方法和设备

摘要

PURPOSE: To provide a device and method for flexibly interconnecting information buses, and make multiple connections at the least cost by using many common components. ;CONSTITUTION: To interconnect 1st and 2nd information buses 26 and 48 having plural data lines respectively, a couple of unidirectional information paths consisting of twisted pair cables are provided together with a 25MHz strobe. Information is transferred by using dummy ECL signal level. A couple of clock differential receiver circuits are provided and data are transferred through an interconnection bus 46 by using both an upstream and a downstream end for a transfer clock signal and transferred from one bus to the other bus at a speed of 50MHz.;COPYRIGHT: (C)1994,JPO
机译:目的:提供一种用于灵活互连信息总线的设备和方法,并通过使用许多通用组件以最低的成本进行多个连接。组成:为了互连分别具有多条数据线的第一和第二信息总线26和48,提供了一对由双绞线电缆组成的单向信息路径以及25MHz选通脉冲。通过使用虚拟ECL信号电平来传输信息。提供了几个时钟差分接收器电路,并且通过使用传输时钟信号的上游和下游端通过互连总线46传输数据,并以50MHz的速度从一个总线传输到另一总线。 1994年,日本特许厅

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