A dynamic RAM device having a self-refresh cycle time measurable directly at the data pin (Dynanmic random access memory device with self-refresh cycle time directly measurable data pin)

摘要

The dynamic random access memory device starts a self refresh mode in response to the CAS-befo-RAS sequence, and the controller 29 provided in the dynamic random access memory device reads data Output system 30 / 26a and the column address designation system 24 and the controller 29 temporarily activates the column address designation system and the data output system temporarily in response to the external test control signal Ptest And the self-refresh cycle time is measured directly from the data output pin I / O.