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Secure storage of data in EEPROM e.g. in motor vehicle controller - comparing data with check word to ensure that storage cells found to be defective are not used for further operations
Secure storage of data in EEPROM e.g. in motor vehicle controller - comparing data with check word to ensure that storage cells found to be defective are not used for further operations
In an electrically erasable programmable read-only memory associated with a CPU, random-access memory and EPROM, the first ten storage addresses (FP1-FP10) are assigned to reception of error information, the next five addresses (CPA-CPE) are used for check sums, and the final address (DZP) houses a defect pointer. After a storage operation, the data and a check data word are compared and if any cell is defective a fresh first word is formed and inserted. USE/ADVANTAGE - In microprocessors of motor vehicle control equipment. Guarantees detection of defective cells in E2PROM, and practically eliminates loss of data.
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