首页> 外国专利> modular expandable digital single koppelnetz in atm (asynchronus transfer mode) technology for a fast packet switched transmission.

modular expandable digital single koppelnetz in atm (asynchronus transfer mode) technology for a fast packet switched transmission.

机译:采用atm(异步传输模式)技术的模块化可扩展数字单koppelnetz,可实现快速的分组交换传输。

摘要

A modularly expandable digital single-stage ATM (Asynchronous Transfer Mode) switching network for high-speed packet-switched information transfer, comprising a preprocessing module (VVM), in which arrangement preprocessing is only carried out with respect to the matrix column but not with respect to the matrix output and the number of expansion inputs and the number of first outputs of the preprocessing module is 1/L, namely N, of that of the expansion module, this module containing a single FIFO store (SP) which can simultaneously enter 2N packets and simultaneously read out N packets and in which arrangement, to avoid so-called overtaking by packets, the order in time of packets in each case arriving on one of the N first-input lines of a preprocessing module (VVM) is replaced case by case by a spatial order on the N first-output lines of the preprocessing module (VVM). An overhead information filter (KF) only processes a part of the overhead information of the data packets for switching the packets to the relevant switching module column. In addition, a further preprocessing module (VVM) and a final processing module (EVM), which carries out final switching to the matrix output, are provided per matrix column, in which arrangement the first outputs of these preprocessing modules (VVM) are connected to the relevant inputs of the final processing modules (EVM). The final processing modules (EVM) do not have any expansion inputs or expansion outputs. The overhead information filter (KF) of the final processing module (EVM) processes a different part of the overhead information for the final switching to a matrix output. …IMAGE…
机译:用于高速分组交换信息传输的模块化可扩展数字单级ATM(异步传输模式)交换网络,包括预处理模块(VVM),其中仅对矩阵列进行布置预处理,而对相对于矩阵输出和预处理模块的扩展输入数量以及第一输出的数量,是扩展模块数量的1 / L,即N,该模块包含一个可以同时进入的FIFO存储(SP) 2N个数据包并同时读出N个数据包,在这种安排中,为了避免所谓的数据包超载,分别替换到达预处理模块(VVM)的N条第一输入线之一的数据包的时间顺序在预处理模块(VVM)的N条第一条输出线上按空间顺序逐个进行排序。开销信息过滤器(KF)仅处理数据包的一部分开销信息,用于将数据包切换到相关的交换模块列。此外,每个矩阵列还提供了另一个预处理模块(VVM)和最终处理模块(EVM),用于最终切换到矩阵输出,在这些布置中,连接了这些预处理模块(VVM)的第一输出到最终处理模块(EVM)的相关输入。最终处理模块(EVM)没有任何扩展输入或扩展输出。最终处理模块(EVM)的开销信息过滤器(KF)处理开销信息的不同部分,以最终切换到矩阵输出。 …<图像>…

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