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Emitter switched thyristor without parasitic thyristor latch-up susceptibility
Emitter switched thyristor without parasitic thyristor latch-up susceptibility
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机译:发射极开关晶闸管,无寄生晶闸管闩锁敏感性
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摘要
An emitter switched thyristor without parasitic thyristor latch-up susceptibility includes a thyristor having an anode region, a first base region, a second base region in the first base region and an emitter region of first conductivity type in the second base region. An electrical connection is provided between the emitter region and the cathode contact by a field effect transistor in the first base region. The transistor is positioned adjacent the second base region and includes a source electrically connected to the emitter region by a metal strap on the surface of the substrate. The drain of the transistor is electrically connected to the cathode contact and has a conductivity type opposite the conductivity type of the first base region. Accordingly, the cathode contact and anode contact are not separated by a four layer parasitic thyristor. Parasitic latch-up operation is thereby eliminated.
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