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Flexible high impedance control in a cole cell in a configurable logic array

机译:可配置逻辑阵列中科尔单元中的灵活高阻抗控制

摘要

The present invention provides a configurable logic array that includes a plurality of individually configurable logic cells arranged in a matrix that includes a plurality of horizontal rows of logic cells and a plurality of vertical columns of logic cells. The array further includes at least one horizontally aligned local bus running between adjacent rows of logic cells, the logic cells in the adjacent rows being connectable thereto, and at least one vertically aligned local bus running between adjacent columns of logic cells, the logic cells in the adjacent columns being connectable thereto. The array further includes a dynamic tristate bus driver associated with each logic cell and connectable to the local busses associated with the corresponding logic cell and means for controlling the dynamic tri-state driver through one or more combinations of inputs to the logic cell.
机译:本发明提供一种可配置逻辑阵列,该可配置逻辑阵列包括以矩阵布置的多个单独可配置逻辑单元,该矩阵包括逻辑单元的多个水平行和逻辑单元的多个垂直列。该阵列还包括在逻辑单元的相邻行之间运行的至少一个水平对齐的局部总线,在相邻行中的逻辑单元可与其连接,以及在逻辑单元的相邻列之间运行的至少一个垂直对齐的局部总线,在逻辑单元中。相邻列可与其连接。该阵列还包括与每个逻辑单元相关联并且可连接到与相应逻辑单元相关联的局部总线的动态三态总线驱动器,以及用于通过对逻辑单元的输入的一种或多种组合来控制动态三态驱动器的装置。

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