PURPOSE:To eliminate the disturbance of a video signal at a search mode and to simplify the circuit constitution by detecting the deviation of an address at the search mode to hypass an input signal to the output side. CONSTITUTION:Since the horizontal synchronizing number during one vertical synchronizing period differs from that at the normal operation in an input signal (a) at a search mode, there exists a deviation between a write address of an address timing circuit 9 and the vertical synchronization of the input video signal. Then a write address deviation detection circuit 10 is operated, a bypass circuit 11 is activated and the input signal (1) is bypasses at the output. Although the write address is deviated and the video signal at the output of a D/A conversion circuit is fluctuated to a vartical synchronizing signal or causes disturbance in the search mode in such a way, since the bypass circuit is operated at the video signal output, the input signal is outputted as it is and no vertical fluctuation nor disturbance is caused in the video image. Further, a complicated circuit to prevent the write address deviation is not required and the circuit scale is decreased.
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