首页> 外国专利> VERIFYING SYSTEM FOR PSEUDO ERROR REDUCING CROSSTALK

VERIFYING SYSTEM FOR PSEUDO ERROR REDUCING CROSSTALK

机译:减少伪差错的验证系统

摘要

PURPOSE: To verify only a genuine error caused by crosstalk by verifying no pseudo error caused by crosstalk. ;CONSTITUTION: A model correcting means 3 supplies the verification-free polarity information stored in a verification-free polarity information storing mean 1, supplies the model information on a crosstalk verifying logic circuit stored in a model storing means 2, adds the verification-free polarity to the model information to acquire the corrected model information, and stores this corrected information in a corrected model storing means 4. A crosstalk verifying means 5 supplies the corrected model information on the logic circuit stored in the means 4, refers to the verification-free polarity to neglect one of rise and fall signals which are put on the corresponding signal line and free from the verification of crosstalk, and verifies the crosstalk if a part that is set in parallel between signal lines is confirmed in a prescribed space or less and in a prescribed length or more.;COPYRIGHT: (C)1995,JPO
机译:目的:通过验证没有由串扰引起的伪错误,仅验证由串扰引起的真正错误。 ;构成:模型校正装置3提供存储在无验证极性信息存储装置1中的无验证极性信息,将模型信息提供到存储在模型存储装置2中的串扰验证逻辑电路上,添加无验证极性与模型信息相反,以获取校正后的模型信息,并将此校正后的信息存储在校正后的模型存储装置4中。串扰验证装置5将校正后的模型信息提供给存储在装置4中的逻辑电路,是指验证-自由极性可忽略放置在相应信号线上的上升和下降信号之一,并且无需进行串扰验证,并且如果在规定的间距或更小空间内确认了在信号线之间平行设置的部分,则可以验证串扰,并且以规定的长度或更长的长度;版权:(C)1995,JPO

著录项

  • 公开/公告号JPH0765048A

    专利类型

  • 公开/公告日1995-03-10

    原文格式PDF

  • 申请/专利权人 NEC CORP;

    申请/专利号JP19930237409

  • 发明设计人 HASEGAWA TAKUMI;

    申请日1993-08-30

  • 分类号G06F17/50;

  • 国家 JP

  • 入库时间 2022-08-22 04:20:54

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