WORDLINE VOLTAGE BOOSTING CIRCUITS FOR COMPLETING MOSFET DYNAMIC MEMORIES.

摘要

TWO EMBODIMENTS OF A WORDLINE BOOST CLOCK CIRCUIT THAT CAN BE USED IN HIGH SPEED DRAM CIRCUITS ARE DISCLOSED. THE CLOCK CIRCUITS REQUIRE ONLY ONE BOOST CAPACITOR AND DISCHARGE THE WORDLINES FASTER, IMPROVING THE DRAM ACCESS TIME. THE BASIC FEATURE OF THE CLOCK CIRCUIT IS IN THE FLOATING GATE STRUCTURE OF THE NMOS DEVICE WHICH DRIVES THE LOAD TO NEGATIVE DURING THE BOOSTING. IN THE FIRST EMBODIMENT OF THE CLOCK, THE GATE OF A FIRST DEVICE IS CONNECTED TO A FIRST NODE THROUGH A SECOND DEVICE. A SECOND NODE, CONNECTED TO A WORDLINE, IS DISCHARGED THROUGH THE FIRST AND A THIRD DEVICE WHEN A THIRD NODE IS HIGH WITH A FOURTH NODE LOW. AFTER A SUFFICIENT DISCHARGE OF THE SECOND NODE, THE FOURTH NODE IS PULLED TO VDD TURNING THE SECOND DEVICE ON AND A FOURTH DEVICE OFF. THE FIRST (NMOS) TRANSISTOR HAS ITS GATE DRAIN CONNECTED TOGETHER AND FORM A DIODE. WHEN A BOOST CAPACITOR PULLS THE THIRD NODE DOWN TO NEGATIVE, THE FIRST DEVICE STAYS COMPLETELY OFF BECAUSE OF ITS DIODE CONFIGURATION AND THE SECOND NODE IS PULLED TO NEGATIVE THROUGH THE THIRD DEVICE. IN THE SECOND EMBODIMENT, A FIRST DEVICE IS CONNECTED BETWEEN A BOOST CAPACITOR AND A SECOND NODE. THE LOAD IS DISCHARGED THROUGH A THIRD DEVICE WITH A FOURTH DEVICE ON BUT A FIRST AND SECOND DEVICE OFF. AFTER A SUFFICIENT DISCHARGE OF THE LOAD, A FOURTH DEVICE IS TURNED OFF BUT A SECOND DEVICE IS TURNED ON; MAKING THE THIRD DEVICE A DIODE. WHEN A FIFTH NODE IS PULLED TO GROUND, THE SECOND NODE IS PULLED DOWN TO NEGATIVE WITH THE FIRST DEVICE ON. IN THE SECOND EMBODIMENT CIRCUIT, THE LOAD DISCHARGES THROUGH ONLY ONE NMOS DEVICE AND CONSEQUENTLY DISHARGES FASTER THAN THE CIRCUIT OF THE FIRST EMBODIMENT.(FIG. 2)