Circuitry for the compression of digital data words by means of a scale factor

摘要

This method and device are intended to provide for very fast data processing speed with little circuit expenditure. For this purpose, the data words provided for the compressed data are split into at least two parts, from the data words of the uncompressed data address words are formed and split into the same number of parts and to each part of the address words a word length is allocated which corresponds to the difference between the word length of the uncompressed data words and the word lengths of the remaining parts of the data words provided for the compressed data. After that, a selected section of the uncompressed data words is allocated as part of the compressed data words to each part of the address words in conjunction with the scale factor in accordance with a stored code table. These parts are then assembled to form complete compressed data words. The invention can be applied, in particular, in the case of D2-Mac for data compression when the system switches from "linear code" to "companded code".