首页> 外国专利> Circuit for smoothing phase jumps in a clock signal and application for filtering the stuffingjitter in a digital bitstream

Circuit for smoothing phase jumps in a clock signal and application for filtering the stuffingjitter in a digital bitstream

机译:用于平滑时钟信号中的相位跳变的电路以及用于过滤数字比特流中的填充抖动的应用

摘要

Device for smoothing phase jumps likely to affect a clock signal, and signalled beforehand by a signal called phase-jump indication signal, characterised in that it includes: - means (1) called delay means for applying to the pulses of the said clock signal a delay which, in the absence of phase jumps, is constant and equal to a value called nominal value, denoted No, and, in the presence of a phase jump, instantaneously, for the pulse of the said clock signal affected by this phase jump, becomes equal to Nc+N or to Nc-N according to whether the said phase jump has an amplitude equal to -N or to +N, where Nc designates the delay applied to the pulse of the said clock signal preceding that affected by this phase jump, then, for a set of following pulses, varies progressively, for the phase jump in question, as appropriate from Nc+N to Nc or from Nc-N to Nc, the nominal value No being deterined in such a way that the said delay values remain positive even in the case of consecutive positive phase jumps, - means (2) controlled by the said phase-jump indication signal, for determining the said delay values. IMAGE
机译:用于平滑可能影响时钟信号的相位跳变的装置,并预先通过称为相位跳动指示信号的信号进行信号发送,其特征在于,该装置包括:-装置(1),用于将所述时钟信号a的脉冲施加到延迟装置。在没有相位跳变的情况下,延迟是恒定的,并且等于称为标称值的值,表示为No,并且在存在相位跳变的情况下,对于受该相位跳变影响的所述时钟信号的脉冲,瞬时地,根据所述相位跳变具有等于-N还是等于+ N的幅度而变为等于Nc + N或等于Nc-N,其中,Nc表示施加到受该相位影响的脉冲之前的所述时钟信号的脉冲的延迟。然后,对于一组随后的脉冲,跃变逐渐变化,对于所讨论的相位跃变,适当地从Nc + N到Nc或从Nc-N到Nc,标称值No以这样的方式确定:即使在连续pos的情况下,延迟值也保持正值相位跳变;-由所述跳相指示信号控制的装置(2),用于确定所述延迟值。 <图像>

著录项

  • 公开/公告号EP0643501A1

    专利类型

  • 公开/公告日1995-03-15

    原文格式PDF

  • 申请/专利权人 ALCATEL CIT;

    申请/专利号EP19940402001

  • 发明设计人 ETIENNE JEAN PAUL;

    申请日1994-09-08

  • 分类号H04J3/07;

  • 国家 EP

  • 入库时间 2022-08-22 04:13:05

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