SERIAL SELECTION CIRCUIT AND OPERATING METHOD THEREOF FOR SEMICONDOCTOR MEMORY

摘要

A serial selection circuit is disclosed for sequentially selecting a word line in a semiconductor memory. Flipflops (latch circuits) for respectively holding the state are connected to each word line W0 to W1023. These flipflops are sequentially activated in response to two-phase non-overlap clock signals, and then deactivated. This serial selection circuit has the circuit structure being highly simplified compared with the conventional row decoder, so that the occupied area on the semiconductor chip is substantially reduced.