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Automatic design method of logic circuit, its system, multiplier and multiplier

机译:逻辑电路的自动设计方法,其系统,乘法器和乘法器

摘要

It is determined whether or not the value of the corresponding bit of the multiplier is 1. If the value of the corresponding bit of the multiplier is 1 when the multiplier is an integer, , A circuit for outputting a signal representing a multiplicand as a partial product is generated, a signal representing the multiplicand is shifted by one bit, and this signal is newly set as a signal for displaying the multiplicand. A circuit for obtaining a partial product corresponding to each bit of the multiplier is generated by repeatedly executing the above process in correspondence with all the bits of the multiplier.
机译:确定乘法器的相应位的值是否为1。如果当乘法器为整数时乘法器的相应位的值为1,则用于输出表示被乘数的信号的电路生成乘积,表示被乘数的信号被移位一位,并且该信号被新设置为用于显示被乘数的信号。通过与乘法器的所有位相对应地重复执行上述处理,来生成用于获得与乘法器的每个位相对应的部分乘积的电路。

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