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Automatic design method of logic circuit, its system, multiplier and multiplier
Automatic design method of logic circuit, its system, multiplier and multiplier
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机译:逻辑电路的自动设计方法,其系统,乘法器和乘法器
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摘要
It is determined whether or not the value of the corresponding bit of the multiplier is 1. If the value of the corresponding bit of the multiplier is 1 when the multiplier is an integer, , A circuit for outputting a signal representing a multiplicand as a partial product is generated, a signal representing the multiplicand is shifted by one bit, and this signal is newly set as a signal for displaying the multiplicand. A circuit for obtaining a partial product corresponding to each bit of the multiplier is generated by repeatedly executing the above process in correspondence with all the bits of the multiplier.
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