Rapid cmos - output buffer with a low noise voltage.

摘要

A CMOS output buffer includes a transient pull-up circuit, a transient pull-down circuit and a keeper circuit. The pull-up circuit is responsive to a high drive enable pulse signal for generating a transition from a low logic level to a high logic level at an output node. The pull-down circuit is responsive to a low drive enable pulse signal for generating a transition from the high logic level to the low logic level at the output node. The keeper circuit is responsive to the high and low drive enable pulse signals so as to maintain the output node at the high logic level after the output node has made the low-to-high transition and to maintain the output node at the low logic level after the output node has made the high-to-low transition. The CMOS output buffer has a high speed of operation and has a high immunity to noise.