Time slot allocation systems and multiplexers with one of these time slot allocation systems.

摘要

P A time slot allocation system comprises a time slot management unit (UGIT) and a plurality of counters (CSO1, to CSOn) connected in series so that the input d '' a counter (CSOi) is connected to the output of the previous counter (CSOi - 1) in the series, the input of the first counter (CSO1) being connected to the output of the time interval management unit (UGIT ), each counter (CSOi) being associated with an input carrying a time interval allocation request signal (half) and being provided with a control input provided for receiving said allocation request signal (half) and delivering either the time interval value (ITin) present on its input if said allocation request signal (half) is inactive, or the time interval value present on its input incremented by one ( ITin + 1) if said request signal (half) is active, the output of each counter (CSO i) being connected to the input of a register (RegAdi), the control input of which is intended to receive said corresponding (half) request signal, each register (RegAdi) then delivering, if 'said corresponding request signal ( half) is active, an allocated time interval signal (ITa). BR/ The invention relates to alternative embodiments of such an allocation system and to multiplexers which are provided with one of these systems. /P