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Method of manufacture of a field effect transistor whose gate is isolated, in particular of the length of the channel and the corresponding transistor.

机译:一种场效应晶体管的制造方法,该场效应晶体管的栅极,特别是沟道和相应晶体管的长度被隔离。

摘要

To produce the region of the gate of transistor, there is formed, on the upper surface of a first conductive or semiconductor - conductive layer (3) arranged on a layer of insulating primary (2) covering the said predetermined zone of the substrate (1), a stepped structure comprising a surface layer having a thickness selected and forming a step, and it forms, at the location of said operation, using an anisotropic etching of the said surface layer, a projecting part (11) comprising at least one central part (11) formed by the residual portion not etched on the surface layer, whose width at the foot, connected to the thickness of the surface layer, defines the length of the transistor channel. It then performs an anisotropic etching of the block formed in step a) so as to be etched, on the whole of its thickness, the part of the first conductive or semiconductor - conductive layer (3) extending on either side of the said protruding region. The region a semi - conductive or conducting grid is defined at least by the zone remaining non-etched of the said first layer, and is insulated from substrate by the part of the primary layer of insulating zone located under said residual not etched of the first conductive or semiconductor - conductive layer (3).
机译:为了产生晶体管的栅极区域,在第一导电或半导体-导电层(3)的上表面上形成,该第一导电或半导体-导电层(3)布置在覆盖衬底(1)的所述预定区域的绝缘初级(2)层上。 ),一种阶梯结构,其包括具有一定厚度的表面层,该表面层具有选定的厚度并形成台阶,并且在所述操作位置,通过对所述表面层的各向异性蚀刻来形成包括至少一个中心的凸起部分(11)由未被蚀刻在表面层上的残留部分形成的部分(11),其在脚处的宽度与表面层的厚度相连,限定了晶体管沟道的长度。然后,其对步骤a)中形成的块进行各向异性蚀刻,以在其整个厚度上蚀刻在所述突出区域的任一侧上延伸的第一导电或半导体-导电层(3)的部分。半导电或导电网格的区域至少由所述第一层的未被蚀刻的剩余区域限定,并且通过位于第一残余物的未被蚀刻的绝缘层的第一层的一部分与衬底绝缘,从而与衬底绝缘。导电或半导体-导电层(3)。

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