Digital amplitude modulators involving (1) modification of amplitude during synchronization pulse, (2) automatic gain control of signal components, and/or (3) analog representation of less significant signal components

摘要

A first aspect of the present modulator provides for a reduction in an otherwise maximum level of an analog input signal during a particular time period (for example, the period of the synchronization pulse in an analog television format). When the normally predictable high- amplitude portion is reduced in amplitude, combiner power efficiency is increased. To regain the full amplitude, the gain of the amplifier corresponding to the most significant bit of the digitized signal being modulated, is increased. A second aspect of the present modulator provides an automatic gain control AGC arrangement especially suitable for the modulator of U.S. Pat. No. 4,804,931. The AGC arrangement is based on a circuit that is governed by the output of a respective amplifier as well as by the binary value of the respective bit corresponding to the significance of the amplifier and a reference value related to the bit's significance. Finally, a third aspect of the modulator minimizes component count by providing a hybrid modulator- transmitter. Lower-order bits of a signal to be modulated contribute to the modulated waveform via an analog-processed portion which does not closely follow the teachings of the '931 patent, providing an optimum balance between power savings and component cost and complexity.