首页> 外国专利> System for obtaining correct byte addresses by XOR-ING 2 LSB bits of byte address with binary 3 to facilitate compatibility between computer architecture having different memory orders

System for obtaining correct byte addresses by XOR-ING 2 LSB bits of byte address with binary 3 to facilitate compatibility between computer architecture having different memory orders

机译:用于通过对字节地址的2个LSB位与二进制3进行异或运算来获得正确的字节地址的系统,以促进具有不同存储顺序的计算机体系结构之间的兼容性

摘要

A method and apparatus for enabling a computer to run using either a Big Endian or Little Endian architecture is provided. The method and apparatus use the fact that XORing the lower two bits of a byte address in one architecture with a binary 3 converts that byte address to the equivalent byte address in the other architecture. The conversion method and apparatus is implemented in hardware by setting a bit in a status register indicating a Big Endian or Little Endian architecture in conjunction with an XOR gate which couples the byte address to binary 3. The conversion method and apparatus is implemented in software by scanning the instructions of the input for load and store instructions. The software modifies the instructions by taking the contents of the register and XORing the two least significant bits of the byte address with a binary 3.
机译:提供了一种使计算机能够使用大端架构或小端架构运行的方法和装置。该方法和设备使用这样的事实,即在一种体系结构中将字节地址的低两位与二进制3进行异或,可以将该字节地址转换为另一种体系结构中的等效字节地址。通过将状态寄存器中指示Big Endian或Little Endian体系结构的位与将字节地址耦合到二进制3的XOR门结合设置,以硬件方式实现该转换方法和装置。扫描输入的指令以获取加载和存储指令。该软件通过获取寄存器的内容并对字节地址的两个最低有效位与二进制3进行XOR来修改指令。

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