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I/O cache controller containing a buffer memory partitioned into lines accessible by corresponding I/O devices and a directory to track the lines

机译:I / O高速缓存控制器,包含一个缓冲存储器,该缓冲存储器被划分为相应的I / O设备可访问的行,以及一个跟踪行的目录

摘要

A cache for use with input/output devices attached to an input/output bus. Requests for access to system memory by an input/output device pass through the cache. Access authority is checked to determine whether an input/output device is authorized to access that particular page. If it is not, access is denied. Each input/output device has access to a portion of the cache, so that activity by one device will not interfere with activity by another.
机译:与连接到输入/输出总线的输入/输出设备一起使用的缓存。输入/输出设备访问系统内存的请求将通过缓存。检查访问权限以确定输入/输出设备是否被授权访问该特定页面。如果不是,则拒绝访问。每个输入/输出设备都可以访问缓存的一部分,因此一个设备的活动不会干扰另一个设备的活动。

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