首页>
外国专利>
Arbitration of packet switched busses, including busses for shared memory multiprocessors
Arbitration of packet switched busses, including busses for shared memory multiprocessors
展开▼
机译:包交换总线的仲裁,包括共享内存多处理器的总线
展开▼
页面导航
摘要
著录项
相似文献
摘要
An arbiter is provided for resolving contention on synchronous packet switched busses, including busses composed of a plurality of pipelined segments, to ensure that all devices serviced by such a bus are given fair, bounded time access to the bus and to permit such devices to fill all available bus cycles with packets. Flow control for shared memory multiprocessors is readily implemented with this arbiter because the arbiter supports different types of arbitration requests and the prioritization of such arbitration requests by type.
展开▼