PURPOSE:To miniaturize a decoding circuit by adopting the constitution for the titled circuit so that a code is converted into an NRZ signal in a pure digital way. CONSTITUTION:A leading detector 11 and a trailing detector 12 detect the leading and trailing edge of a biphase code respectively synchronously with a clock from a clock generator 14. Moreover, a start bit detection circuit 16 detects the start bit of the biphase code. 1std-3rd state discrimination circuits 19-21 discriminate the state of output of the leading detector 12, the trailing detector 12 and the start bit detection circuit 16. A frequency divider 15 divides the clock frequency from the clock generator 14 and is cleared by an output of the 2nd state discrimination circuit 20. An NRZ signal is outputted from the D flip-flop 13 using the output of the frequency division circuit 15 as a clock and using the biphase code as its D input.
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