REDUNDANT BINARY MULTIPLIER, REDUNDANT BINARY ALU, AND PROGRAM CONTROL CIRCUIT

摘要

PURPOSE: To not only speed up processing, but also utilize a means for obtaining a complement of 2, required for logical operation, as redundant binary notation to complement notation of 2 by adding and subtracting redundant binary data mutually or logically processing complement data of 2 mutually. ;CONSTITUTION: Buses 1 and 2 are buses which transfer data in redundant binary notation or complement notation of 2, and send and receive data to and from a memory 3, a multiplier 4, an ALU 5, and a control circuit 6. The memory 3 is controlled by a memory control signal group 7 generated by the control circuit 6 to input and hold data of the buses 1 and 2 and also output data to the buses 1 and 2. The multiplier 4 is controlled by a multiplier control signal group 8 generated by the control circuit 6, and inputs and multiplies the data of the buses 1 and 2 and outputs the redundant binary data to the buses 1 and 2. The ALU 5 is controlled by an ALU control signal group generated by the control circuit 6, and inputs and processes the data of the buses 1 and 2 and outputs the redundant binary data or complement data of 2, or the logical operation result to the buses 1 and 2.;COPYRIGHT: (C)1995,JPO