Periodic system management interrupt source and power management system employing the same

摘要

A periodic system management interrupt (SMI) source is provided that includes a programmable timer for asserting an SMI at a predetermined rate. A microprocessor is coupled to a periodic SMI source through a CPU local bus. The periodic SMI source may be programmed by executing an I/O write cycle which allows a count value and an enable bit to be loaded into an internal configuration register. When the enable bit is set, the programmable timer asserts a periodic system management interrupt at a fixed rate as determined by the count value within the configuration register. The periodic system management interrupt may be asserted, for example, at intervals of 16 milliseconds, 64 milliseconds, 245 milliseconds, 1 second, 16 seconds, or 1 minute. The periodic SMI source allows for the automatic generation of a periodic system management interrupt independently of software.