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High accuracy winner-take-all circuit for selecting maximum current as output from N input currents for fuzzy logic application

机译:高精度赢家通吃电路,用于从N个输入电流中选择最大电流作为输出,用于模糊逻辑应用

摘要

The circuit generates an output current (Iout) which is equal to the maximum current among a number n of input currents (I1,2,3,..,n). The circuit includes a number of n identical cells (C1,2,3..n), each receiving an input current. The cell outputs are linked to a common line (LC) connected to a bias current source (20). The common line voltage (Vc) controls a transistor (T10) which constitutes a current mirror for the first transistor of the cell whose input current is maximum. The transistor delivers the circuit output current.
机译:该电路产生的输出电流(Iout)等于输入电流(I1,2,3,..,n)的n个中的最大电流。该电路包括n个相同的单元(C1,2,3..n),每个单元接收输入电流。单元输出链接到连接到偏置电流源(20)的公共线(LC)。公共线电压(Vc)控制晶体管(T10),该晶体管构成输入电流最大的单元的第一晶体管的电流镜。晶体管提供电路输出电流。

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