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Reducing memory access in a multi-cache multiprocessing environment with each cache mapped into different areas of main memory to avoid contention
Reducing memory access in a multi-cache multiprocessing environment with each cache mapped into different areas of main memory to avoid contention
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机译:减少多缓存多处理环境中的内存访问,每个缓存映射到主内存的不同区域以避免争用
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摘要
A cache control circuit reduces accesses of main memory in a multiple cache multiprocessing system. The circuit allows the use of multiple caches with a single central processing unit, and facilitates burst-mode operations.
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