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Elevated voltage level I.sub.DDQ failure testing of integrated circuits
Elevated voltage level I.sub.DDQ failure testing of integrated circuits
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机译:集成电路的高电压等级I.sub.DDQ故障测试
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摘要
Burn in testing of static CMOS IC's is eliminated by I.sub.DDQ testing at elevated voltage levels. These voltage levels are at least 25% higher than the normal operating voltage for the IC but are below voltage levels that would cause damage to the chip.
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