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Circuit design for point-to-point chip for high speed testing

机译:用于高速测试的点对点芯片的电路设计

摘要

A test assembly for testing integrated circuits. The assembly includes a test chip that is located between the integrated circuit (IC) and a tester. The test chip has a very low input capacitance that approximates an open circuit, and has an impedance that matches the impedance of the integrated circuit and tester. The matching impedance of the test chip reduces the amount of signal ringing between the integrated circuit and tester.
机译:用于测试集成电路的测试组件。该组件包括位于集成电路(IC)和测试仪之间的测试芯片。测试芯片的输入电容非常低,接近开路,并且其阻抗与集成电路和测试仪的阻抗相匹配。测试芯片的匹配阻抗减少了集成电路和测试仪之间的信号振铃量。

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