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Circuit design for point-to-point chip for high speed testing
Circuit design for point-to-point chip for high speed testing
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机译:用于高速测试的点对点芯片的电路设计
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摘要
A test assembly for testing integrated circuits. The assembly includes a test chip that is located between the integrated circuit (IC) and a tester. The test chip has a very low input capacitance that approximates an open circuit, and has an impedance that matches the impedance of the integrated circuit and tester. The matching impedance of the test chip reduces the amount of signal ringing between the integrated circuit and tester.
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