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Non-volatile semiconductor memory device with verify mode for verifying data written to memory cells

机译:具有验证模式的非易失性半导体存储器件,用于验证写入存储单元的数据

摘要

A non-volatile semiconductor memory device includes a flip- flop circuit for holding write data in one of first and second states. A bit line is connected to the flip-flop circuit via a switching element, and a transistor charges the bit line. A non-volatile memory cell, connected to the bit line and having a MOS transistor structure, stores data when a threshold thereof is set in one of first and second threshold ranges, wherein at the time of a write mode the threshold of the memory cell is shifted from the first threshold range towards the second threshold range while the flip-flop circuit remains in the first state and the shift of the threshold is not effected while the flip-flop circuit remains in the second state, and at the time of a verify mode following the write mode the bit line is kept at a charge potential by the charging transistor while the threshold remains in the second threshold range. A data setting circuit for connects one of first and second signal nodes of the flip- flop circuit to a predetermined potential when the bit line is at the charge potential in the verify mode, thereby setting the flip-flop circuit in the second state irrespective of the state prior to the verify mode.
机译:非易失性半导体存储器件包括用于将写入数据保持在第一状态和第二状态之一的触发器电路。位线通过开关元件连接到触发器电路,并且晶体管对位线充电。当其阈值被设置在第一阈值范围和第二阈值范围之一中时,连接到位线并具有MOS晶体管结构的非易失性存储单元存储数据,其中在写模式时,存储单元的阈值当触发器电路保持在第一状态时,从第一阈值范围向第二阈值范围移位,并且在触发器电路保持在第二状态时,不影响阈值的移位。在写入模式之后的验证模式下,当阈值保持在第二阈值范围内时,充电晶体管将位线保持在充电电位。数据设置电路,用于在验证模式下当位线处于充电电势时将触发器电路的第一信号节点和第二信号节点之一连接到预定电势,从而将触发器电路设置为第二状态验证模式之前的状态。

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