OFFSET VOLTAGE COMPENSATION METHOD FOR ANALOG ARITHMETIC UNIT AND ANALOG ARITHMETIC UNIT

摘要

PROBLEM TO BE SOLVED: To accelerate an arithmetic processing by suppressing the frequency of the compensation operation of an offset voltage generated by electric charges accumulated in a floating gate to be the cause of an arithmetic errors in an analog arithmetic unit provided with an amplifier for which an input voltage is supplied through an input capacitor, realization is performed by a CMOS inverter or the like and the node of an input terminal is turned to the floating gate. SOLUTION: The floating gate MOS 12 is provided to control the electric charge amount of the node P1 and the electric charge amount of the node P1 is controlled by the injection of hot electrons or the discharge of the electric charge by a tunnel effect by the MOS 12. Thus, while the electric charge amount can not be held fixed over the long period of time by leakage by a switch in conventional constitution provided with the switch or the like for the discharge of the electric charges between the node P1 and an output terminal, such a failure can be dissolved in this unit.