首页> 外国专利> TEST METHOD AND CIRCUIT OF ASSOCIATIVE MEMORY CIRCUIT AND ASSOCIATIVE MEMORY CIRCUIT WITH REDUNDANCY FUNCTION

TEST METHOD AND CIRCUIT OF ASSOCIATIVE MEMORY CIRCUIT AND ASSOCIATIVE MEMORY CIRCUIT WITH REDUNDANCY FUNCTION

机译:具有冗余功能的联想存储电路和联想存储电路的测试方法和电路

摘要

PROBLEM TO BE SOLVED: To easily test a CAM (associative memory) by automatically generating the test pattern of inspection data. SOLUTION: An inverter INV1 inverts a scan signal SOD1 outputted from a scan path and gives it to 1-input terminal of a selector SEL1. The scan input SIDI is obtained by inverting the scan output of a scan flip flop SFF-DDI2. Therefore, when testing a CAM100, a test signal CAMTEST is set to '1', thus cyclically generating input signals D10, D11, and D12, namely initial value of retention data (0, 0, 0) →(1, 0, 0) → (1, 1, 0) → (1, 1, 1) → (0, 1, 1) →(0, 0, 1) → (0, 0, 0) →... and hence eliminating the need for consecutively creating inspection data in advance and giving them to each scan flip flop by shifting.
机译:解决的问题:通过自动生成检查数据的测试模式来轻松测试CAM(关联存储器)。解决方案:反相器INV1将从扫描路径输出的扫描信号SOD1反相,并将其提供给选择器SEL1的1输入端子。通过将扫描触发器SFF-DDI2的扫描输出反相来获得扫描输入SIDI。因此,在测试CAM100时,将测试信号CAMTEST设置为“ 1”,从而循环生成输入信号D10,D11和D12,即保持数据的初始值(0,0,0)→(1,0,0 )→(1,1,0)→(1,1,1)→(0,1,1)→(0,0,1)→(0,0,0)→...因此不需要用于预先连续创建检查数据,并通过移位将其提供给每个扫描触发器。

著录项

  • 公开/公告号JPH09180498A

    专利类型

  • 公开/公告日1997-07-11

    原文格式PDF

  • 申请/专利权人 MITSUBISHI ELECTRIC CORP;

    申请/专利号JP19950337064

  • 发明设计人 MAENO HIDESHI;

    申请日1995-12-25

  • 分类号G11C29/00;G06F11/22;G06F12/16;

  • 国家 JP

  • 入库时间 2022-08-22 03:36:31

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