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GAAS SCHOTTKY-GATE FILED EFFECT TRANSISTOR

机译:GAAS肖特基栅极场效应晶体管

摘要

PROBLEM TO BE SOLVED: To provide a GaAs MESFET having the high value of withstand voltage between an Si substrate and a drain electrode. ;SOLUTION: On an Si substrate 11, an SiO2 layer having the thickness of 1,000Å-2,000Å is provided as an insulating layer 13. On the insulating layer 13, a c-Si layer 15 having the thickness of 1μm is provided. Furthermore, on the c-Si layer 15, an i-GaAs layer 17 having the thickness of 3μm, an Al0.3Ga0.7 As layer 19 having the thickness of 2μm, an n-GaAs layer 21 having the thickness of 50-150nm and an n+-GaAs layer 23 having the thickness of 50nm are sequentially provided. On the n-GaAs layer 21 exposed from the n+-GaAs layer 23, a gate electrode 25 is provided. Furthermore, a source electrode 27 and a drain electrode 29 are provided on the n+-GaAs layer 23 at the right and left sides with the gate electrode 25 in-between. Then, an isolation layer 31 surrounding a GaAs MESFET 100 is provided at the outside of the source electrode 27 and the drain electrode 29 so as to electrically separate the part between the neighboring GaAs MESFETs 100.;COPYRIGHT: (C)1997,JPO
机译:解决的问题:提供一种在Si衬底和漏极之间具有高耐压值的GaAs MESFET。 ;解决方案:在Si衬底11上,形成厚度为1000&-20002,000的SiO 2 层。设置作为绝缘层13的绝缘层13。在绝缘层13上,设置厚度为1μm的c-Si层15。此外,在c-Si层15上,具有3μm的厚度的i-GaAs层17,具有2μm的厚度的Al 0.3 Ga 0.7 作为层19,依次提供厚度为50-150nm的n-GaAs层21和厚度为50nm的n + -GaAs层23。在从n + -GaAs层23暴露的n-GaAs层21上,设置栅电极25。此外,源电极27和漏电极29设置在左右两侧的nSup + GaSAs层23上,并且栅电极25位于其间。然后,在源电极27和漏电极29的外部设置围绕GaAs MESFET 100的隔离层31,以将相邻的GaAs MESFET 100之间的部分电隔离。;版权所有:(C)1997,JPO

著录项

  • 公开/公告号JPH0955388A

    专利类型

  • 公开/公告日1997-02-25

    原文格式PDF

  • 申请/专利权人 OKI ELECTRIC IND CO LTD;

    申请/专利号JP19950207063

  • 申请日1995-08-14

  • 分类号H01L21/338;H01L29/812;H01L29/872;

  • 国家 JP

  • 入库时间 2022-08-22 03:32:59

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