MICROPROCESSOR WITH ARCHITECTURE-MODE CONTROL CAPABLE OF SUPPORTING EXPANSION TO TWO SEPARATE INSTRUCTION SET ARCHITECTURES

摘要

PROBLEM TO BE SOLVED: To provide a processor supporting two different architectures under one multitask processing operating system. SOLUTION: The microprocessor 10 includes a mode controller 108 controlling an architecture context, and the controller 108 is provided with a memory managing device(MMU) 103 permitting the generation of address conversion under the control of a mode bit and switching a converting mechanism from one architecture to the other. One MMU 103 converts the addresses of the two different architectures to properly decode an instruction. In addition MMU 103 maps the address conversion of one archtecture to that of the other so as to multitask-process a software written for both archtectures under the control of one operating system.