Flexible Host Interface Control Architecture (FLEXIBLE HOST INTERFACE CONTROLLER ARCHITECTURE)

摘要

A high level controller that maintains communication with the host processor to establish a communication path between the host processor interface, the internal processor and the multiple storage means via the host processor. The first means receives an indication from an internal processor when an indicia specifies one of the communication paths and generates a control signal to match the requested specific communication path. The second means receives the control signal from the first means and forms the requested communication path. The third means connected to the first and second means controls the communication of the system to the host processor interface in accordance with the control signal generated by the first means. In this way, multiple data paths for communication between the host interface, the internal processor and the multiple storage means are designated and configured for optimal use of the system.