1. The technical field to which the invention described in the claims belongs:;A submicron gate array input and output master slice.;2. The technical problem the invention is trying to solve:;A submicron gate array input / output master slice is provided to ensure stable operation.;3. Summary of the Solution of the Invention:;A sub-micron gate array input / output master slice, comprising: a level shift region consisting of an n-type transistor region, an isolated-type transistor region, and a shared-type transistor region; The present invention is made up of a free drive region consisting of a single transistor, an output drive region consisting of a separate type transistor and an en-type transistor, and a left and right symmetrical separate transistor.;4. Significant use of the invention;;Suitable for submicron gate array input and output master slices.
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