Complimentary clock generation manner and complimentary clock generator

摘要

PROBLEM TO BE SOLVED: To provide a complementary clock generator capable of obtaining accurate complementary clock signals in terms of time base. ;SOLUTION: When an input clock signal is given to a 1st control input terminal 21 of a 1st transfer switch 2 and an inverted clock signal inverting the input clock signal by a 1st inverter 11 is given to a 2nd control input terminal 22, the input clock signal given to an input terminal 23 is delivered to an output terminal 24, to obtain an in-phase output clock signal. When the inverted clock signal is given to a 1st control input terminal 31 of a 2nd transfer switch 3 and the input clock signal is given to a 2nd control input terminal 32, the inverted clock signal given to the input terminal 23 is delivered to an output terminal 34 and the inverted output clock signal in the same timing is outputted as the in-phase output clock signal.;COPYRIGHT: (C)1997,JPO