METHOD AND APPARATUS FOR REDUCED-COMPLEXITY VITERBI-TYPE SEQUENCE DETECTORS

摘要

A Viterbi detector is modified to reduce itsimplementation complexity. A partial-response signalmay be viewed as a sequence of expected samplesgenerated from a finite-state-machine model. In atypical Viterbi demodulator implemented using the add,compare, select (ACS) method, each state in the expectedsample sequence model is associated with a hardwaremodule to perform the functions of adding new brancherror metrics to path error metrics, comparing patherror metrics, and selecting the path having the lowestpath error metric. In this invention, an ACS module mayhave two or more sequence-model states dynamicallyassociated with it, such that at some times onesequence-model state is associated with it and at othertimes another sequence-model state is associated withit. This reduces the number of ACS modules required andalso reduces the size/complexity of the demodulator'spath memories which must store one path for each ACSmodule. Groups of sequence-model states may be chosento share an ACS module without significant loss inperformance as compared to the original, unreducedViterbi demodulator. The invention supports a widerange of sample models by making the expected samplesequence of an isolated medium transition programmable.The invention reduces the speed at which the detectorcircuitry must operate relative to the sample rate byallowing multiple samples to be processedsimultaneously. Several reduced detectors for specificsample sequence models are presented for particularapplications. The invention is applicable to othertypes of Viterbi detectors, such as decoders forconvolution codes.