A SYSTEM LEVEL MECHANISM FOR INVALIDATING DATA STORED IN THE EXTERNAL CACHE OF A PROCESSOR IN A COMPUTER SYSTEM

摘要

A computer system is disclosed including a memory subsystem and aprocessor subsystem having an external cache and an external mechanism forinvalidating cached datablocks in the processor subsystem and for reducing falseinvalidation operations . The processor subsystem issues a write invalidatemessage to the memory subsystem that specifies a datablock and that includesan invalidate advisory indication that indicates whether the datablock is presentin the external cache. The invalidate advisory indication determines whetherthe memory subsystem returns an invalidate message to the processorsubsystem for the write invalidate operation.