controllers for high voltage bypass modes of tension failure - vs

摘要

In a level shifted high voltage MOSgate device driver which drives MOSgate devices such as IGBTs and power MOSFETs, effects of negative voltage swings caused by currents commutating through LS1 and LS2 inductances in the power circuits are avoided due to several measures. First, the values of the inductances LS1 and LS2 are reduced by keeping short conductor lengths, by other layout/wire bonding techniques to reduce the values of the LS1 and LS2 inductances. The external, charging capacitor Cb value is increased substantially to reduce the voltage buildup on the internal circuitry. A typical value is 0.47 mu F, for a given circuit, IGBT and layout combination. The size of the CVCC capacitor is selected to keep the supply voltage as stiff as possible. Preferably, CVCC is at about ten times the value of the sum of the Cb capacitance in the circuit. The resistance Rb in the bootstrap path is reduced as much as possible, preferably to zero. Finally, a resistor RCOM is optionally added between the common nodes of the driver circuit and the power device circuit.