CLOCK GENERATION CIRCUIT FOR MULTISTANDARD SERIAL DIGITAL VIDEO WITH AUTOMATIC FORMAT IDENTIFICATION

摘要

A voltage controlled reference oscillator (20)with a high Q and narrow tunability bandwidthproduces an output oscillator frequency which isfrequency divided (18) by four alternative constantsto produce four different clock frequencies for fourdifferent digital video standards, D1 component at270 MHz, NTSC D2 composite at 143 MHz, PAL D2composite at 177 MHz, and a proposed new compositevideo standard that is to operate at a 360 MHz clockrate. Automatic identification of which serialdigital video is present is accomplished by havingthe clock generator (20,18) produce a clock signalat the frequency required by one of the videoformats while a phase lock loop (90,26) attempts tolock onto the incoming signals at that frequency.If no lock occurs within a predetermined timeinterval, the clock generator (20,18) is made toproduce a clock signal at the frequency required bya different one of the video formats and the phaselock (90,26) is attempted again. This is repeateduntil a lock is attained. Optionally, when a lockoccurs, the video is tested (80) for validity withinthe format that is consistent with the clockfrequency that produced the lock.